1. Field
Embodiments of the invention apply to semiconductor device manufacture and, more particularly, to applying nitride layers to enhance transistor performance.
2. Background
In the fabrication of MOS (Metal Oxide Semiconductor) transistors, nitride film, such as Si3N4, is often used as a first layer in a dielectric stack separating transistors from the upper metal layers of a die. The nitride layer is used as a contact NESL (Nitride Etch Stop Layer). The stress properties of the nitride film influence the performance of the MOS transistors by straining the silicon in the transistor channel.
A highly tensile NESL will enhance the performance of NMOS (N-channel Metal Oxide Semiconductor) transistors but degrade the performance of PMOS (P-channel Metal Oxide Semiconductor) transistors. Higher stressed tensile NESL yields greater enhancements for NMOS devices and also creates greater corresponding degradation in PMOS performance. On the other hand, a compressive NESL will enhance the performance of PMOS transistors and degrade the performance of NMOS transistors. Similarly a higher stress compressive layer yields a greater improvement in PMOS and a greater degradation in NMOS performance.
In a circuit with both PMOS and NMOS transistors, tensile NESL has been used to enhance NMOS performance. The negative effect of the tensile NESL on PMOS performance has been reduced by engineering PMOS source and drain regions to isolate the PMOS channel from the stresses of adjacent nitride films. This approach may work well with moderate stress tensile films. However, as the intrinsic tensile stress of the film increases, the isolation may be overcome or become too large or complex. As a result, the amount of stress of the tensile NESL is limited by the impact on PMOS devices. The improvement in NMOS performance is also limited.